https://mechanicalsnail.com/categories/systems/Recent content in Systems on Mechanical Snailhttps://mechanicalsnail.com/images/logo.pnghttps://mechanicalsnail.com/images/logo.pngHugo -- 0.152.2en-usMon, 24 Nov 2025 10:00:00 +0100https://mechanicalsnail.com/posts/wire-formats-rust/Mon, 24 Nov 2025 10:00:00 +0100https://mechanicalsnail.com/posts/wire-formats-rust/Choosing a wire format at scale: JSON, Protocol Buffers, Cap'n Proto, FlatBuffers, Avro and MessagePack compared on payload size, encode/decode cost, and schema evolution.https://mechanicalsnail.com/posts/caching/Fri, 14 Feb 2025 12:00:00 +0100https://mechanicalsnail.com/posts/caching/A survey of production caching strategies: cache-aside, read-through, write-through and write-back, LRU and friends as eviction policies, and the consistency trade-offs each one implies.https://mechanicalsnail.com/posts/social-media-architecture/Sun, 08 Oct 2023 13:00:00 +0100https://mechanicalsnail.com/posts/social-media-architecture/Systems architecture for an Instagram-scale social platform: fan-out on write versus read, graph sharding, feed caching, and absorbing celebrity-tier traffic spikes.https://mechanicalsnail.com/posts/actors/Sun, 17 Apr 2022 15:44:00 +0100https://mechanicalsnail.com/posts/actors/How the Actor Model replaces shared memory with message passing: its origins in Erlang, supervision trees, mailbox semantics, and where actors fit in modern distributed systems.https://mechanicalsnail.com/posts/vector-optimization-simd/Fri, 11 Mar 2022 10:00:00 +0100https://mechanicalsnail.com/posts/vector-optimization-simd/Why vector code is memory-bound, not compute-bound: cache-line behaviour, array-of-structs versus struct-of-arrays layout, AVX vectorization, and the bandwidth ceiling.