<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>SIMD on Mechanical Snail</title><link>https://mechanicalsnail.com/tags/simd/</link><description>Recent content in SIMD on Mechanical Snail</description><image><title>Mechanical Snail</title><url>https://mechanicalsnail.com/images/logo.png</url><link>https://mechanicalsnail.com/images/logo.png</link></image><generator>Hugo -- 0.152.2</generator><language>en-us</language><lastBuildDate>Wed, 26 Mar 2025 10:00:00 +0100</lastBuildDate><atom:link href="https://mechanicalsnail.com/tags/simd/index.xml" rel="self" type="application/rss+xml"/><item><title>Columnar Storage in Go: Fast Financial Aggregation</title><link>https://mechanicalsnail.com/posts/columnar-storage-golang-financial/</link><pubDate>Wed, 26 Mar 2025 10:00:00 +0100</pubDate><guid>https://mechanicalsnail.com/posts/columnar-storage-golang-financial/</guid><description>Building a columnar storage engine in Go: cache-friendly memory layout, fixed-point decimal arithmetic for financial precision, SIMD-friendly aggregations, and honest benchmarks.</description></item><item><title>Neural Networks from Scratch in Rust</title><link>https://mechanicalsnail.com/posts/neural-networks-rust/</link><pubDate>Tue, 18 Mar 2025 10:00:00 +0100</pubDate><guid>https://mechanicalsnail.com/posts/neural-networks-rust/</guid><description>Neural networks from first principles in Rust: manual backpropagation, cache-friendly matrix operations, SIMD utilization, and where inference time is actually spent.</description></item><item><title>Vector Optimization: SIMD, Cache Lines &amp; Memory Bandwidth</title><link>https://mechanicalsnail.com/posts/vector-optimization-simd/</link><pubDate>Fri, 11 Mar 2022 10:00:00 +0100</pubDate><guid>https://mechanicalsnail.com/posts/vector-optimization-simd/</guid><description>Why vector code is memory-bound, not compute-bound: cache-line behaviour, array-of-structs versus struct-of-arrays layout, AVX vectorization, and the bandwidth ceiling.</description></item></channel></rss>